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ACT8332
Rev0, 14-Mar-08
Three Channel Integrated Power Management IC for Handheld Portable Equipment FEATURES
* Multiple Patents Pending * Three Integrated Regulators
- 350mA PWM Step-Down DC/DC - 360mA Low Noise LDO - 360mA Low Noise LDO
GENERAL DESCRIPTION
The patent-pending ACT8332 is a complete, cost effective, highly-efficient ActivePMUTM power management solution that is ideal for a wide range of portable handheld equipment. This device integrates one PWM step-down DC/DC converter and two low noise, low dropout linear regulators (LDOs) in a single, thin, space-saving package. This device is ideal for a wide range of portable handheld equipment that can benefit from the advantages of ActivePMU technology but does not require a high level of integration. REG1 is a fixed-frequency, current-mode PWM step-down DC/DC converter that is optimized for high efficiency and is capable of supplying up to 350mA output current. REG1's output is available in a variety of factory-preset output voltage options, and an adjustable output voltage mode is also available. REG2, REG3 are low noise, high PSRR linear regulators that are capable of supplying up to 360mA, and 360mA, respectively. The ACT8332 is available in a tiny 3mm x 3mm 10-pin Thin-DFN package that is just 0.75mm thin.
* Independent Enable/Disable Control * Minimal External Components * 3x3mm, Thin-DFN (TDFN33-10) Package
- Only 0.75mm Height - RoHS Compliant
APPLICATIONS
* Portable Devices and PDAs * MP3/MP4 Players * Wireless Handhelds * GPS Receivers, etc.
SYSTEM BLOCK DIAGRAM
REG1
Battery Step-Down DC/DC
OUT1 Adjustable, or 1.2V to 3.3V Up to 350mA OUT2 1.4V to 3.7V Up to 360mA OUT3 1.4V to 3.7V Up to 360mA
ON1 ON3
System Control
REG2
LDO
Pb
Pb-free
ACT8332
Active
REG3
LDO
PMU
TM
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ActivePMUTM is a trademark of Active-Semi.
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ACT8332
FUNCTIONAL BLOCK DIAGRAM
Rev0, 14-Mar-08
Active-Semi
VP1
ACT8332
UVLO ON1 ON3 REG1 SW1 FB1 GP1
To Battery
OUT1
INL
To Battery or OUT1
GA
REG2 LDO
OUT2
REG3 LDO
OUT3
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ActivePMUTM is a trademark of Active-Semi.
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ACT8332
ORDERING INFORMATION
PART NUMBER
ACT8332NDAQB-T
Rev0, 14-Mar-08
VOUT1
Adjustable
VOUT2
2.85V
VOUT3
2.5V
PACKAGE
TDFN33-10
PINS
10
TEMPERATURE RANGE
-40C to +85C
REG1 OUTPUT VOLTAGE CODES
A Adjustable C 1.2V P 1.3V J 1.4V D 1.5V E 1.8V F 2.5V I 2.8V Q 2.85V G 3.0V H 3.3V
REG2 OUTPUT VOLTAGE CODES
J 1.4V D 1.5V L 1.7V E 1.8V F 2.5V I 2.8V Q 2.85V G 3.0V H 3.3V
REG3 OUTPUT VOLTAGE CODES
E 1.4V G 1.5V K 1.7V M 1.8V B 2.5V H 2.8V I 2.85V L 3.0V R 3.3V
: Output voltage options detailed in this table represent standard voltage options, and are available for samples or production orders. Additional output voltage options, as detailed in the Output Voltage Codes table, are available for production subject to minimum order quantities. Contact Active-Semi for more information regarding semi-custom output voltage combinations. : All Active-Semi components are RoHS Compliant and with Pb-free plating unless specified differently. The term Pb-free means semiconductor products that are in compliance with current RoHS (Restriction of Hazardous Substances) standards.
PIN CONFIGURATION
TOP VIEW
VP1 SW1 GP1 OUT2 INL
1 2 3 4 5
10
FB1 ON3 ON1 GA OUT3
Active-Semi
ACT8332
9 8 7 6
Thin - DFN (TDFN 33-10)
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ActivePMUTM is a trademark of Active-Semi.
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ACT8332
PIN DESCRIPTIONS
PIN
1 2 3 4 5 6 7 8 9
Rev0, 14-Mar-08
NAME
VP1 SW1 GP1 OUT2 INL OUT3 GA ON1 ON3
DESCRIPTION
Power Input for REG1. Bypass to GP1 with a high quality ceramic capacitor placed as close as possible to the IC. Switching node Output for REG1. Connect this pin to the switching end of the inductor. Power Ground for REG1. Connect GA, GP1 together at a single point as close to the IC as possible. Output voltage for REG2. Capable of delivering up to 360mA of output current. Output has high impedance when disabled. Power input for REG2, REG3. Bypass to GA with a high quality ceramic capacitor placed as close as possible to the IC. Output voltage for REG3. Capable of delivering up to 360mA of output current. Output has high impedance when disabled. Analog Ground. Connect GA directly to a quiet ground node. Connect GA, GP1 together at a single point as close to the IC as possible. Enable control input for REG1, REG2. Drive ON1 to the VP1 or a logic high for normal operation, drive to GA or a logic low to disable REG1, REG2 Enable control input for REG3. Drive ON3 to the INL or a logic high for normal operation, drive to GA or a logic low to disable REG3 Output Feedback Sense. For fixed output voltage options REG1, connect this pin directly to the output node to connect the internal feedback network to the output voltage. For adjustable output voltage Options REG1. The voltage at this pin is regulated to 0.625V. Connect this pin to the center point of the output voltage feedback network between OUT1 and GA to set the output voltage. Exposed Pad. Must be soldered to ground on PCB
10
FB1
EP
EP
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ACT8332
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SW1 to GP1, INL, VP1, FB1, OUT2, OUT3, ON1, ON3 to GA SW1 to VP1 GP1 to GA Junction to Ambient Thermal Resistance (JA) Operating Temperature Range Junction Temperature Storage Temperature Lead Temperature (Soldering, 10 sec)
Rev0, 14-Mar-08
VALUE
-0.3 to +6 -6 to +0.3 -0.3 to +0.3 33 -40 to 85 125 -55 to 150 300
UNIT
V V V C/W C C C C
: Do not exceed these limits to prevent damage to the device. Exposure to absolute maximum rating conditions for long periods may affect device reliability.
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ActivePMUTM is a trademark of Active-Semi.
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ACT8332
STEP-DOWN DC/DC CONVERTER ELECTRICAL CHARACTERISTICS (REG1)
(VVP1 = 3.6V, TA = 25C, unless otherwise specified.)
Rev0, 14-Mar-08
PARAMETER
VP1 Operating Voltage Range VP1 UVLO Threshold VP1 UVLO Hysteresis Standby Supply Current Shutdown Supply Current Adjustable Output Option Regulation Voltage Output Voltage Regulation Accuracy Line Regulation Load Regulation Current Limit Oscillator Frequency ON1 Logic High Input Voltage ON1 Logic Low Input Voltage PMOS On-Resistance NMOS On-Resistance SW1 Leakage Current Power Good Threshold Minimum On-Time Thermal Shutdown Temperature Thermal Shutdown Hysteresis
TEST CONDITIONS
Input Voltage Rising Input Voltage Falling
MIN
3.1 2.9
TYP
3 90 130
MAX
5.5 3.1
UNIT
V V mV
200 1
A A V
ON1 = GA, VVP1 = 4.2V
0.1 0.625
VNOM1 < 1.3V, IOUT1 = 10mA VNOM1 1.3V, IOUT1 = 10mA VVP1 = Max(VNOM1 + 1V, 3.2V) to 5.5V IOUT1 = 10mA to 350mA
-2.4% -1.2%
VNOM1 VNOM1 0.15 0.0017
+1.8% +1.8%
V %/V %/mA A
0.45 VOUT1 20% of VNOM1 VOUT1 = 0V VINL = 3.1V to 5.5V, VVP1 = 3.1V to 5.5V, TA = -40C to 85C VINL = 3.1V to 5.5V, VVP1 = 3.1V to 5.5V, TA = -40C to 85C ISW1 = -100mA ISW1 = 100mA VVP1 = 5.5V, VSW1 = 5.5V or 0V 1.4 1.35
0.6 1.6 530 1.85
MHz kHz V
0.4 0.52 0.27 0.88 0.46 1 94 70
V A %VNOM1 ns C C
Temperature Rising Temperature Falling
160 20
: VNOM1 refers to the nominal output voltage level for VOUT1 as defined by the Ordering Information section.
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ActivePMUTM is a trademark of Active-Semi.
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ACT8332
STEP-DOWN DC/DC CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS
(ACT8332NDAQB, VVP1 = 3.6V, L = 3.3H, CVP1 = 2.2F, COUT1 = 10F, TA = 25C, unless otherwise specified.)
Rev0, 14-Mar-08
REG1 Efficiency vs. Load Current
100 VOUT1 = 1.8V 90 3.2V 650
REG1 Transient Peak Inductor Current
ACT8332-002
Peak Inductor Current (mA)
ACT8332-001
630
Efficiency (%)
80
3.6V
4.2V
610
70
590
60
570 550
50 0.1 1 10 100 1000
3.0
3.5
4.0
4.5
5.0
5.5
Output Current (mA)
VP1 Voltage (V)
REG1 MOSFET Resistance
600 500 PMOS 0.2
REG1 Load Regulation Load Regulation Error (%)
ACT8332-003 ACT8332-004
0.0 -0.2 -0.4 -0.6 -0.8 -1.0 4.2V
RDSON (m)
400 300 200 100 0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 NMOS
3.6V
0
50
100
150
200
250
300
350
400
VP1 Voltage (V)
Output Current (mA)
OUT1 Regulation Voltage
1.812 1.808 ACT8332-005 IOUT1 = 35mA
OUT1 Voltage (V)
1.804 1.800 1.796 1.792 1.788 -40 -20 0 20 40 60 85
Temperature (C)
Innovative PowerTM
ActivePMUTM is a trademark of Active-Semi.
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ACT8332
STEP-DOWN DC/DC CONVERTER FUNCTIONAL DESCRIPTION
General Description
REG1 is a fixed-frequency, current-mode, synchronous PWM step-down converters that achieves a peak efficiency of up to 97%. REG1 is capable of supplying up to 350mA of output current and operates with a fixed frequency of 1.6MHz, minimizing noise in sensitive applications and allowing the use of small external components. REG1 is available with a variety of standard and custom output voltages, as well as an adjustable output voltage option.
Rev0, 14-Mar-08
Input Capacitor Selection
The input capacitor reduces peak currents and noise induced upon the voltage source. A 2.2F ceramic input capacitor is recommended for most applications.
Output Capacitor Selection
For most applications, a 10F ceramic output capacitor is recommended. Although REG1 was designed to take advantage of the benefits of ceramic capacitors, namely small size and very-low ESR, low-ESR tantalum capacitors can provide acceptable results as well.
100% Duty Cycle Operation
REG1 is capable of operating at up to 100% duty cycle. During 100% duty-cycle operation, the high-side power MOSFET is held on continuously, providing a direct connection from the input to the output (through the inductor), ensuring the lowest possible dropout voltage in battery-powered applications.
Inductor Selection
REG1 utilizes current-mode control and a proprietary internal compensation scheme to simultaneously simplify external component selection and optimize transient performance over its full operating range. REG1 was optimized for operation with a 3.3H inductor, although inductors in the 2.2H to 4.7H range can be used. Choose an inductor with a low DC-resistance, and avoid inductor saturation by choosing inductors with DC ratings that exceed the maximum output current of the application by at least 30%.
Synchronous Rectification
REG1 features an integrated n-channel synchronous rectifier, which maximizes efficiency and minimizes the total solution size and cost by eliminating the need for an external rectifier.
Enabling and Disabling REG1
REG1 is enabled or disabled using ON1. Drive ON1 to a logic-high to enable REG1. Drive ON1 to a logic-low to disable REG1, reducing supply current to less than 1A
Thermal Shutdown
The ACT8332 integrates thermal shutdown protection circuitry to prevent damage resulting from excessive thermal stress, as may be encountered under fault conditions. This circuitry disables all regulators if the ACT8332 die temperature exceeds 160C, and prevents the regulators from being enabled until the IC temperature drops by 20C (typ).
Soft-Start
REG1 includes internal soft-start circuitry, and enabled its output voltage tracks an internal 80s softstart ramp so that it powers up in a monotonic manner that is independent of loading.
Output Voltage Programming
Figure 4 shows the feedback network necessary to set the output voltage when using the adjustable output voltage option. Select components as follows: Set RFB2 = 51K, then calculate RFB1 using the following equation:
Compensation
REG1 utilizes current-mode control and a proprietary internal compensation scheme to simultaneously simplify external component selection and optimize transient performance over its full operating range. No compensation design is required, simply follow a few simple guidelines described below when choosing external components.
V RFB1 = RFB2 OUT1 - 1 V FB1
Where VFB1 is 0.625V
(1)
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ACT8332
STEP-DOWN DC/DC CONVERTER
Figure 4: Output Voltage Programming
OUT1 ACT8332 FB RFB2 CFF RFB1
Rev0, 14-Mar-08
Finally choose CFF using the following equation:
C FF =
2.2 x 10 -6 R FB1
(2)
where RFB1 = 47k, use 47pF.
PCB Layout Considerations
High switching frequencies and large peak currents make PC board layout an important part of stepdown DC/DC converter design. A good design minimizes excessive EMI on the feedback paths and voltage gradients in the ground plane, both of which can result in instability or regulation errors. Step-down DC/DCs exhibit discontinuous input current, so the input capacitors should be placed as close as possible to the IC, and avoiding the use of vias if possible. The inductor, input filter capacitor, and output filter capacitor should be connected as close together as possible, with short, direct, and wide traces. The ground nodes for each regulator's power loops should be connected at a single point in a starground configuration, and this point should be connected to the backside ground plane with multiple vias. For fixed output voltage options, connect the output node directly to the FB1 pin. For adjustable output voltage options, connect the feedback resistors and feed-forward capacitor to the FB1 pin through the shortest possible route. In both cases, the feedback path should be routed to maintain sufficient distance from switching nodes to prevent noise injection. Finally, the exposed pad should be directly connected to the backside ground plane using multiple vias to achieve low electrical and thermal resistance.
Innovative PowerTM
ActivePMUTM is a trademark of Active-Semi.
-9-
www.active-semi.com Copyright (c) 2008 Active-Semi, Inc.
ACT8332
LOW-DROPOUT LINEAR REGULATORS ELECTRICAL CHARACTERISTICS (REG2, REG3)
(VINL = 3.6V, COUT = 1F, TA = 25C, unless otherwise specified.)
Rev0, 14-Mar-08
PARAMETER
INL Operating Voltage Range INL UVLO Threshold UVLO Hysteresis Output Voltage Accuracy Line Regulation Error Load Regulation Error Power Supply Rejection Ratio
TEST CONDITIONS
VINL Input Rising VINL Input Falling TA = 25C TA = -40C to 85C VINL = Max(VOUT + 0.5V, 3.6V) to 5.5V IOUT = 1mA to 360mA f = 1kHz, IOUT = 360mA, COUT = 1F f = 10kHz, IOUT = 360mA, COUT = 1F REG2 or REG3 Enabled
MIN
3.1 2.9
TYP
3 0.1
MAX
5.5 3.1
UNIT
V V V
-1.2 -2.5
VNOM1 VNOM 0 -0.004 70 60 85 125 1.5
+2 +3
% mV %/mA dB
Supply Current
REG2 and REG3 Enabled REG2 and REG3 Disabled
A
ON1, ON3 Logic High Input Voltage VINL = 3.1V to 5.5V, TA = -40C to 85C ON1, ON3 Logic Low Input Voltage Dropout Voltage Output Current Current Limit Internal Soft-Start Power Good Flag High Threshold Output Noise Stable COUT Range Discharge Resistor in Shutdown Thermal Shutdown Temperature Thermal Shutdown Hysteresis LDO Disabled Temperature Rising Temperature Falling VOUT, hysteresis = -4% COUT = 10F, f = 10Hz to 100kHz VOUT = 95% of regulation voltage
2
1.4 0.4 100 200 360 400 100 89 40 1 1000 160 20 20
V V mV mA mA s % VRMS F C C
VINL = 3.1V to 5.5V, TA = -40C to 85C IOUT = 160mA, VOUT > 3.1V
: VNOM refers to the nominal output voltage level for VOUT2 or VOUT3 as defined by the Ordering Information section. : Dropout Voltage is defined as the differential voltage between input and output when the output voltage drops 100mV below the regulation voltage at 1V differential voltage. : LDO current limit is defined as the output current at which the output voltage drops to 95% of the respective regulation voltage. Under heavy overload conditions the output current limit folds back by 30% (typ)
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ActivePMUTM is a trademark of Active-Semi.
- 10 -
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ACT8332
LOW-DROPOUT LINEAR REGULATORS TYPICAL PERFORMANCE CHARACTERISTICS
(ACT8332NDAQB, VINL = 5V, TA = 25C, unless otherwise specified.)
Rev0, 14-Mar-08
Load Regulation
0.5 0.4 225 ACT8332-006 200 175 150 125 100 75 50 25 0 0 25 50 75 100 125 150 175 200 225 250 300 360 0
Dropout Voltage vs. Output Current
ACT8332-007
Output Voltage (%)
0.3 0.2 0.1 0.0 -0.1 -0.2 -0.3 -0.4 -0.5
Dropout Voltage (mV)
REG2, REG3
3.1V 3.3V 3.6V 50 100 150 200 250 300 360
Load Current (mA)
Output Current (mA)
Output Voltage Deviation vs. Temperature
0.5 ACT8332-008
LDO Output Voltage Noise
ACT8332-009
Output Voltage Deviation (%)
0.4 0.3 0.2 0.1 0.0 -0.1 -0.2 -0.3 -0.4
ILOAD = 0mA
CH1
-0.5 -40
-15
10
35
60
85
Temperature (C)
CH1: VOUTx, 200V/div (AC COUPLED) TIME: 200ms/div
Region of Stable COUT ESR vs. Output Current
ACT8332-010 1
ESR ()
0.1 Stable ESR
0.01 0 50 100 150 200 250 300 360
Output Current (mA)
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ActivePMUTM is a trademark of Active-Semi.
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www.active-semi.com Copyright (c) 2008 Active-Semi, Inc.
ACT8332
LOW-DROPOUT LINEAR REGULATORS FUNCTIONAL DESCRIPTION
General Description
REG2 and REG3 are low-noise, low-dropout linear regulators (LDOs) that are optimized for low-noise and high-PSRR operation, achieving more than 60dB PSRR at frequencies up to 10kHz.
Rev0, 14-Mar-08
A good design places input and output capacitors as close to the LDO inputs and output as possible, and utilizes a star-ground configuration for all regulators to prevent noise-coupling through ground. Output traces should be routed to avoid close proximity to noisy nodes, particularly the SW nodes of the DC/DCs.
Output Current Capability
REG2 and REG3 each supply 360mA of load current. Excellent performance is achieved over each regulator's entire load current ranges.
Output Current Limit
In order to ensure safe operation under over-load conditions, each LDO features current-limit circuitry with current fold-back. The current-limit circuitry limits the current that can be drawn from the output, providing protection in over-load conditions. For additional protection under extreme over current conditions, current-fold-back protection reduces the current-limit by approximately 30% under extreme overload conditions.
Enabling and Disabling the LDOs
REG2 and REG3 is enabled or disabled using ON1 and ON3. Drive ON1 and ON3 to a logic-high to enable REG2 and REG3. Drive ON1 and ON3 to a logic-low to disable REG2 and REG3, reducing supply current to less than 1A.
Output Capacitor Selection
REG2 and REG3 each require only a small ceramic capacitor for stability. For best performance, each output capacitor should be connected directly between the OUT2 and OUT3 and G pins as possible, with a short and direct connection. To ensure best performance for the device, the output capacitor should have a minimum capacitance of 1F, and ESR value between 10m and 200m. High quality ceramic capacitors such as X7R and X5R dielectric types are strongly recommended.
PCB Layout Considerations
The ACT8332's LDOs provide good DC, AC, and noise performance over a wide range of operating conditions, and are relatively insensitive to layout considerations. When designing a PCB, however, careful layout is necessary to prevent other circuitry from degrading LDO performance.
Innovative PowerTM
ActivePMUTM is a trademark of Active-Semi.
- 12 -
www.active-semi.com Copyright (c) 2008 Active-Semi, Inc.
ACT8332
PACKAGE INFORMATION PACKAGE OUTLINE
TDFN33-10 PACKAGE OUTLINE AND DIMENSIONS
D
Rev0, 14-Mar-08
SYMBOL
A
E
DIMENSION IN MILLIMETERS MIN
0.700 0.000 0.153 2.900 2.900 2.350 1.650 0.200
DIMENSION IN INCHES MIN
0.028 0.0000 0.006 0.114 0.114 0.093 0.065 0.008
MAX
0.800 0.050 0.253 3.100 3.100 2.450 1.750 0.320
MAX
0.031 0.002 0.010 0.122 0.122 0.096 0.069 0.012
A1 A3 D E D2
Active-Semi, Inc. reserves the right to modify the circuitry or specifications without notice. Users should evaluate each product to make sure that it is suitable for their applications. Active-Semi products are not intended or authorized for use as critical components in lifesupport devices or systems. Active-Semi, Inc. does not assume any liability arising out of the use of any product or circuit described in this datasheet, nor does it convey any patent license. Active-Semi and its logo are trademarks of Active-Semi, Inc. For more information on this and other products, contact sales@activesemi.com or visit http://www.active-semi.com. For other inquiries, please send to: 1270 Oakmead Parkway, Suite 310, Sunnyvale, California 94085-4044, USA
Innovative PowerTM
ActivePMUTM is a trademark of Active-Semi.
A3
A
E2 b e L
A1 e
D2
0.500 TYP 0.300 0.500
0.020 TYP 0.012 0.020
E2
L b
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